Enhancement of flash memory endurance using short pulsed program/erase signals

Authors

  • Philippe Chiquet Aix-Marseille Universite, IM2NP-CNRS UMR 7334, rue Frederic Joliot-Curie, 13451 Marseille, France
  • Jérémy Postel-Pellerin Aix-Marseille Universite, IM2NP-CNRS UMR 7334, rue Frederic Joliot-Curie, 13451 Marseille, France
  • Célia Tuninetti Aix-Marseille Universite, IM2NP-CNRS UMR 7334, rue Frederic Joliot-Curie, 13451 Marseille, France
  • Sarra Souiki-Figuigui Aix-Marseille Universite, IM2NP-CNRS UMR 7334, rue Frederic Joliot-Curie, 13451 Marseille, France
  • Pascal Masson Nice Sophia-Antipolis University EPOC, 06410 Biot, France

DOI:

https://doi.org/10.21014/acta_imeko.v5i4.422

Abstract

The present paper proposes to investigate the effect of short pulsed Program/Erase signals on the functioning of Flash memory transistors. Usually, electrical operations related to said devices involve the application of single long pulses to various terminals of the transistor to induce various tunneling effects allowing the variation of the floating gate charge.  According to the literature, the oxide degradation occurring after a number of electrical operations, leading to loss of performance and reliability, can be reduced by replacing DC stress by AC stress or by reducing the time spent under polarization by the MOS-based devices. After a brief presentation of the functioning of the Flash memory transistors tested in this work, the experimental setup used to replace standard electric signals with short pulses will be described. Electrical results showing the benefits of programming and erasing non-volatile memories with short pulses will then be presented.

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Published

2016-12-30

Issue

Section

Research Papers