Setting up of a floating gate test bench in a low noise environment to measure very low tunneling currents

Authors

  • Jeremy Postel-Pellerin Aix-Marseille University, IM2NP-CNRS, UMR 7334
  • Gilles Micolau Avignon University, EMMAH UMR 1114
  • Philippe Chiquet Aix-Marseille University, IM2NP-CNRS, UMR 7334
  • Jeanne Melkonian Aix-Marseille University, IM2NP-CNRS, UMR 7334
  • Guillaume Just Aix-Marseille University, IM2NP-CNRS, UMR 7334, ST Microelectronics
  • Daniel Boyer LSBB, UMS 3538
  • Cyril Ginoux Avignon University, EMMAH UMR 1114

DOI:

https://doi.org/10.21014/acta_imeko.v4i3.251

Abstract

We propose and develop a complete solution to evaluate very low leakage currents in Nonâ€Volatile Memories, based on the Floatingâ€Gate Technique. We intend to use very basic tools (power supply, multimeter,...) but with a very good current resolution. The aim of this work is to show the feasibility of such measurements and the ability to reach current levels lower than the ones obtained by any direct measurement, even from highâ€performance devices. The key node is that the experiment is led in a very particular lowâ€noise environment (underground laboratory) allowing to keep the electrical contacts on the device under test as long as possible. We have demonstrated the feasibility of this approach and obtained a very promising 10â€17A current level in less than two weeks.

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Published

2015-09-27

Issue

Vol. 4 No. 3 (2015)

Section

Research Papers

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