, Nicolaus Copernicus University, Poland
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Acta IMEKO Vol. 4 No. 1 (2015) - Research Papers
Architecture of the multi-tap-delay-line time-interval measurement module implemented in FPGA device
Abstract PDF M_Zielinski_ACTAIMEKO_full_changes.docx Architecture of the Multi-Tap-Delay-Line Time-Interval Measurement Module Implemented in FPGA Device Architecture of the Multi-Tap-Delay-Line Time-Interval Measurement Module Implemented in FPGA Device